Digital IC Design Project Engineer

Primary assignment:

Digital Design and Physical Layout design, FPGA design, and/or subcontractors’ monitoring.

Duties and Responsibilities:

  • ‪Assume responsibility for RTL development efforts including specifications, RTL design, verification, synthesis.
  • ‪Assume responsibility for development of FPGA for APB (Asynchronous Pulse Blanker.) DFFT, Digit IF, packages to be designed for digital sections of the radiometers.
  • ‪ Interact with the other departments of the company and ensure that all the infrastructure and interface related to software and hardware are in compliance with the specifications.
  • Set standards for the technological development in the company and lead the staff towards its fulfillment.

Skills and Qualifications:

  • ‪Hands-on experience with front-end design up to synthesis and STA is desirable.
  • Hands-on experience with DIF, FFT, APB (Asynchronous Pulse Blank) and other aspects of physical design are preferred.
  • Capability to monitor contractors to successful completion of hardware design is a must.
  • ‪Expertise that is directly applicable to analysis and design of power distribution network for the products in small size processors.
  • ‪Knowledge of top level design and verification methodologies to be able to mentor design engineers at junior levels. (Requirement for Project Engineer)
  • ‪FPGA design.
  • ‪Familiar with generation and validation of silicon IP releases, with relevant functional, timing, and test views.
  • ‪Solid knowledge of adaptive control theory highly desirable.
  • ‪Expertise and distinguished achievements in a relevant area in circuitry design (such as low power design, voltage/frequency scaling, etc.)
  • ‪Excellent leadership skills including communication skills and negotiation skills (Requirement for Project Engineer)
  • ‪Excellent organization skills and ability to manage time well (Requirement for Project Engineer)

Education and Work Experiences:

  • Bachelor, Master or Ph.D. degree in related Engineering fields
  • 1 to 4 years (junior level) or 5+ years (senior level) of professional or industrial experience in digital circuitry design and FPGA design and code implementation or relevant areas.

Please send resume to: HR, Michelle Yen (

POST DATE: 05/25/2018

Go Back ->